fdn340p general description this p-channel logic level mosfet is produced using fairchild semiconductor advanced power trench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. these devices are well suited for portable electronics applications: load switching and power management, battery charging circuits, and dc/dc conversion. features ? 2 a, 20 v. r ds(on) = 0. 0 7 w @ v gs = ?4.5 v r ds(on) = 0.1 1 w @ v gs = ?2.5 v. r ds(on) = 0.210 w @ v gs = ?1.8 v. low gate charge (8nc typical) . high performance trench technology for extremely low r ds(on) . high power version of industry standard sot-23 package . identical pin-out to sot-23 with 30% higher power handling capability. g d s supersot -3 tm 340 d s g absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage ?20 v v gss gate-source voltage 8 v i d drain current ? continuous (note 1a) ?2 a ? pulsed ?10 power dissipation for single operation (note 1a) 0 .5 p d (note 1b) 0.46 w t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 2 50 c/w r q jc thermal resistance, junction-to-case (note 1) 7 5 c/w package marking and ordering information device marking device reel size tape width quantity 340 fdn340p 7?? 8mm 3000 units smd type smd type smd type smd type smd type smd type smd type smd type smd type smd type product specification 1 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = ?250 m a ?20 v d bv dss d t j breakdown voltage temperature coefficient i d = ?250 m a,referenced to 25 c ? 15 mv/ c v ds = ?16 v, v gs = 0 v ?1 m a i dss zero gate voltage drain current t j = 5 5 c ?10 i gssf gate?body leakage, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate?body leakage, reverse v gs = ?8 v v ds = 0 v ?100 na on characteristics (note 2) v gs( th ) gate threshold voltage v ds = v gs , i d = ?250 m a ?0.4 ?0. 9 ?1 .5 v d v gs( th) d t j gate threshold voltage temperature coefficient i d = ?250 m a,referenced to 25 c 2 .7 mv/ c v gs = ?4.5 v, i d = ?2 a 0. 0 52 0. 0 7 w t j =125 c 0.075 0.12 v gs = ?2.5 v, i d = ?1.7a, 0.078 0.11 r ds(on) static drain?source on?resistance v gs = ?1.8 v, i d = ?1.2 a, 0.21 i d(on) on?state drain current v gs = ?4.5 v, v ds = ?5 v ? 5 a g fs forward transconductance v ds = ? 4. 5 v, i d = ? 2 a 8 s dynamic characteristics c iss input capacitance 600 pf c oss output capacitance 175 pf c rss reverse transfer capacitance v ds = ?10 v, v gs = 0 v, f = 1.0 mhz 80 pf switching characteristics (note 2) t d(on) turn?on delay time 6 1 2 ns t r turn?on rise time 9 18 ns t d(off) turn?off delay time 31 50 ns t f turn?off fall time v dd = ?5 v, i d = ? 0.5 a, v gs = ?4.5 v, r gen = 6 w 2 6 42 ns q g total gate charge 8 11 nc q gs gate?source charge 1.3 nc q gd gate?drain charge v ds = ? 10 v, i d = ? 2 a, v gs = ?4.5 v 2.2 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current ? 0.4 2 a v sd drain?source diode forward voltage v gs = 0 v, i s = ? 0.4 2 a (note ) ?0.7 ?1.2 v notes: 1. r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. a. 250c/w when mounted on a 0.02in 2 pad of 2 oz copper b. 270c/w when mounted on a .001 in 2 pad of 2 oz copper scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 m s, duty cycle < 2.0% fdn340p smd type smd type smd type smd type smd type smd type smd type smd type smd type smd type product specification 2 of 2 4008-318-123 sales@twtysemi.com http://www.twtysemi.com
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